📦 cyh-ustc / xilinx-fpga-configuration-via-jtag

config the 7 series fpga via jtag by rpi

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📥 Clone https://github.com/cyh-ustc/xilinx-fpga-configuration-via-jtag.git

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cyh-ustc Create README.md b299a6e 8 years ago 📝 History

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📄 .gitignore

📄 jtag.py

📄 README.md

xilinx-fpga-configuration-via-jtag

config the 7 series fpga via jtag on rpi support .bin & .bit maid just for fun it would take about 3mins to config my xilinx atrix-7 75t csg324-1 bitstream file(3.64MB)