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72#![allow(clippy::missing_safety_doc)]
#![allow(clippy::identity_op)]
#![allow(clippy::unnecessary_cast)]
#![allow(clippy::erasing_op)]
# [doc = "External interrupt/event controller"]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct Exti { ptr : * mut u8 } unsafe impl Send for Exti { } unsafe impl Sync for Exti { } impl Exti { # [inline (always)]
pub const unsafe fn from_ptr (ptr : * mut ()) -> Self { Self { ptr : ptr as _ , } } # [inline (always)]
pub const fn as_ptr (& self) -> * mut () { self . ptr as _ } # [doc = "Rising Trigger selection register"]
# [inline (always)]
pub const fn rtsr (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x0usize + n * 32usize) as _) } } # [doc = "Falling Trigger selection register"]
# [inline (always)]
pub const fn ftsr (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x04usize + n * 32usize) as _) } } # [doc = "Software interrupt event register"]
# [inline (always)]
pub const fn swier (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x08usize + n * 32usize) as _) } } # [doc = "Rising pending register"]
# [inline (always)]
pub const fn rpr (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x0cusize + n * 32usize) as _) } } # [doc = "Falling pending register"]
# [inline (always)]
pub const fn fpr (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x10usize + n * 32usize) as _) } } # [doc = "Security configuration register"]
# [inline (always)]
pub const fn seccfgr (self , n : usize) -> crate :: common :: Reg < regs :: Seccfgr , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x14usize + n * 36usize) as _) } } # [doc = "Privilege configuration register"]
# [inline (always)]
pub const fn privcfgr (self , n : usize) -> crate :: common :: Reg < regs :: Privcfgr , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x18usize + n * 28usize) as _) } } # [doc = "Configuration register"]
# [inline (always)]
pub const fn exticr (self , n : usize) -> crate :: common :: Reg < regs :: Exticr , crate :: common :: RW > { assert ! (n < 4usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x60usize + n * 4usize) as _) } } # [doc = "EXTI lock register"]
# [inline (always)]
pub const fn lockrg (self) -> crate :: common :: Reg < regs :: Lockrg , crate :: common :: RW > { unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x70usize) as _) } } # [doc = "Interrupt mask register"]
# [inline (always)]
pub const fn imr (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x80usize + n * 16usize) as _) } } # [doc = "Event mask register"]
# [inline (always)]
pub const fn emr (self , n : usize) -> crate :: common :: Reg < regs :: Lines , crate :: common :: RW > { assert ! (n < 2usize) ; unsafe { crate :: common :: Reg :: from_ptr (self . ptr . add (0x84usize + n * 16usize) as _) } } } pub mod regs { # [doc = "external interrupt configuration register 1"]
# [repr (transparent)]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct Exticr (pub u32) ; impl Exticr { # [doc = "EXTI configuration bits"]
# [inline (always)]
pub const fn exti (& self , n : usize) -> u8 { assert ! (n < 4usize) ; let offs = 0usize + n * 8usize ; let val = (self . 0 >> offs) & 0xff ; val as u8 } # [doc = "EXTI configuration bits"]
# [inline (always)]
pub fn set_exti (& mut self , n : usize , val : u8) { assert ! (n < 4usize) ; let offs = 0usize + n * 8usize ; self . 0 = (self . 0 & ! (0xff << offs)) | (((val as u32) & 0xff) << offs) ; } } impl Default for Exticr { # [inline (always)]
fn default () -> Exticr { Exticr (0) } } # [doc = "EXTI lines register, 1 bit per line"]
# [repr (transparent)]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct Lines (pub u32) ; impl Lines { # [doc = "EXTI line"]
# [inline (always)]
pub const fn line (& self , n : usize) -> bool { assert ! (n < 32usize) ; let offs = 0usize + n * 1usize ; let val = (self . 0 >> offs) & 0x01 ; val != 0 } # [doc = "EXTI line"]
# [inline (always)]
pub fn set_line (& mut self , n : usize , val : bool) { assert ! (n < 32usize) ; let offs = 0usize + n * 1usize ; self . 0 = (self . 0 & ! (0x01 << offs)) | (((val as u32) & 0x01) << offs) ; } } impl Default for Lines { # [inline (always)]
fn default () -> Lines { Lines (0) } } # [doc = "EXTI lock register"]
# [repr (transparent)]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct Lockrg (pub u32) ; impl Lockrg { # [doc = "LOCK"]
# [inline (always)]
pub const fn lock (& self) -> bool { let val = (self . 0 >> 0usize) & 0x01 ; val != 0 } # [doc = "LOCK"]
# [inline (always)]
pub fn set_lock (& mut self , val : bool) { self . 0 = (self . 0 & ! (0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize) ; } } impl Default for Lockrg { # [inline (always)]
fn default () -> Lockrg { Lockrg (0) } } # [doc = "Privilege configuration register"]
# [repr (transparent)]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct Privcfgr (pub u32) ; impl Privcfgr { # [doc = "Security enable on event input x"]
# [inline (always)]
pub const fn priv_ (& self , n : usize) -> bool { assert ! (n < 32usize) ; let offs = 0usize + n * 1usize ; let val = (self . 0 >> offs) & 0x01 ; val != 0 } # [doc = "Security enable on event input x"]
# [inline (always)]
pub fn set_priv_ (& mut self , n : usize , val : bool) { assert ! (n < 32usize) ; let offs = 0usize + n * 1usize ; self . 0 = (self . 0 & ! (0x01 << offs)) | (((val as u32) & 0x01) << offs) ; } } impl Default for Privcfgr { # [inline (always)]
fn default () -> Privcfgr { Privcfgr (0) } } # [doc = "Security configuration register"]
# [repr (transparent)]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct Seccfgr (pub u32) ; impl Seccfgr { # [doc = "Security enable on event input x"]
# [inline (always)]
pub const fn sec (& self , n : usize) -> bool { assert ! (n < 32usize) ; let offs = 0usize + n * 1usize ; let val = (self . 0 >> offs) & 0x01 ; val != 0 } # [doc = "Security enable on event input x"]
# [inline (always)]
pub fn set_sec (& mut self , n : usize , val : bool) { assert ! (n < 32usize) ; let offs = 0usize + n * 1usize ; self . 0 = (self . 0 & ! (0x01 << offs)) | (((val as u32) & 0x01) << offs) ; } } impl Default for Seccfgr { # [inline (always)]
fn default () -> Seccfgr { Seccfgr (0) } } }