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23{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1556719162463 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1556719162463 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed May 01 16:59:22 2019 " "Processing started: Wed May 01 16:59:22 2019" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1556719162463 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1556719162463 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off fakequidditch -c fakequidditch " "Command: quartus_map --read_settings_files=on --write_settings_files=off fakequidditch -c fakequidditch" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1556719162463 ""}
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" { } { } 0 20028 "Parallel compilation is not licensed and has been disabled" 0 0 "Quartus II" 0 -1 1556719162838 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fakequidditch.v 1 1 " "Found 1 design units, including 1 entities, in source file fakequidditch.v" { { "Info" "ISGN_ENTITY_NAME" "1 fakequidditch " "Found entity 1: fakequidditch" { } { { "fakequidditch.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clock_divider.v 1 1 " "Found 1 design units, including 1 entities, in source file clock_divider.v" { { "Info" "ISGN_ENTITY_NAME" "1 clock_divider " "Found entity 1: clock_divider" { } { { "clock_divider.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/clock_divider.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "vga_horizontal.v 1 1 " "Found 1 design units, including 1 entities, in source file vga_horizontal.v" { { "Info" "ISGN_ENTITY_NAME" "1 vga_horizontal " "Found entity 1: vga_horizontal" { } { { "vga_horizontal.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/vga_horizontal.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "vga_vertical.v 1 1 " "Found 1 design units, including 1 entities, in source file vga_vertical.v" { { "Info" "ISGN_ENTITY_NAME" "1 vga_vertical " "Found entity 1: vga_vertical" { } { { "vga_vertical.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/vga_vertical.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "vga_controller.v 1 1 " "Found 1 design units, including 1 entities, in source file vga_controller.v" { { "Info" "ISGN_ENTITY_NAME" "1 vga_controller " "Found entity 1: vga_controller" { } { { "vga_controller.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/vga_controller.v" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1556719162884 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "fakequidditch " "Elaborating entity \"fakequidditch\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1556719162916 ""}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "current_line fakequidditch.v(13) " "Verilog HDL or VHDL warning at fakequidditch.v(13): object \"current_line\" assigned a value but never read" { } { { "fakequidditch.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 13 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1556719162916 "|fakequidditch"}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "current_pixel fakequidditch.v(14) " "Verilog HDL or VHDL warning at fakequidditch.v(14): object \"current_pixel\" assigned a value but never read" { } { { "fakequidditch.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 14 0 0 } } } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1556719162916 "|fakequidditch"}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clock_divider clock_divider:cd " "Elaborating entity \"clock_divider\" for hierarchy \"clock_divider:cd\"" { } { { "fakequidditch.v" "cd" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 16 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1556719162931 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "vga_horizontal vga_horizontal:vga_hor " "Elaborating entity \"vga_horizontal\" for hierarchy \"vga_horizontal:vga_hor\"" { } { { "fakequidditch.v" "vga_hor" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 18 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1556719162931 ""}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 vga_horizontal.v(10) " "Verilog HDL assignment warning at vga_horizontal.v(10): truncated value with size 32 to match size of target (10)" { } { { "vga_horizontal.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/vga_horizontal.v" 10 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1556719162947 "|fakequidditch|vga_horizontal:vga_hor"}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "vga_vertical vga_vertical:vga_ver " "Elaborating entity \"vga_vertical\" for hierarchy \"vga_vertical:vga_ver\"" { } { { "fakequidditch.v" "vga_ver" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 20 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Quartus II" 0 -1 1556719162963 ""}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 vga_vertical.v(9) " "Verilog HDL assignment warning at vga_vertical.v(9): truncated value with size 32 to match size of target (10)" { } { { "vga_vertical.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/vga_vertical.v" 9 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Quartus II" 0 -1 1556719162963 "|fakequidditch|vga_vertical:vga_ver"}
{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "1 " "1 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Quartus II" 0 -1 1556719163259 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Quartus II" 0 -1 1556719163416 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Quartus II" 0 -1 1556719163416 ""}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "1 " "Design contains 1 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "clk " "No output dependent on input pin \"clk\"" { } { { "fakequidditch.v" "" { Text "C:/Users/e224774/Desktop/fakequidditch/fakequidditch.v" 3 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1556719163509 "|fakequidditch|clk"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Quartus II" 0 -1 1556719163509 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "1 " "Implemented 1 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "1 " "Implemented 1 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1556719163525 ""} { "Info" "ICUT_CUT_TM_OPINS" "0 " "Implemented 0 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1556719163525 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1556719163525 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 8 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4707 " "Peak virtual memory: 4707 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1556719163541 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed May 01 16:59:23 2019 " "Processing ended: Wed May 01 16:59:23 2019" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1556719163541 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1556719163541 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1556719163541 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1556719163541 ""}